Messages in this thread | | | Date | Mon, 24 Jul 2023 10:31:11 +0100 | From | Jonathan Cameron <> | Subject | Re: [RESEND PATCH 0/4] Add support for SMMU ECMDQ |
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On Fri, 21 Jul 2023 02:35:09 -0400 Tanmay Jagdale <tanmay@marvell.com> wrote:
> Resending the patches by Zhen Lei <thunder.leizhen@huawei.com> that add > support for SMMU's ECMDQ feature. > > I have tested these patches on Marvell SoC that has the ECMDQ feature.
Hi Tammay,
If sending someone else's series you are 'handling' the patches, so should add your own SoB after the original author's one. Also, given you've tested them, a Tested-by tag would make sense.
Any perf numbers you can share would also help push this forwards by showing why people care. I believe Leizhen's numbers were emulation based, so not as good as real hardware for making the justification for the added complexity!
Jonathan
> > Zhen Lei (4): > iommu/arm-smmu-v3: Add support for ECMDQ register mode > iommu/arm-smmu-v3: Ensure that a set of associated commands are > inserted in the same ECMDQ > iommu/arm-smmu-v3: Add arm_smmu_ecmdq_issue_cmdlist() for non-shared > ECMDQ > iommu/arm-smmu-v3: Add support for less than one ECMDQ per core > > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 419 +++++++++++++++++++- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 37 ++ > 2 files changed, 448 insertions(+), 8 deletions(-) >
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