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SubjectRe: [RFC PATCH v2 3/6] KVM: x86: SVM: Pass through shadow stack MSRs
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On Wed, May 24, 2023, John Allen wrote:
> If kvm supports shadow stack, pass through shadow stack MSRs to improve
> guest performance.
>
> Signed-off-by: John Allen <john.allen@amd.com>
> ---
> arch/x86/kvm/svm/svm.c | 17 +++++++++++++++++
> arch/x86/kvm/svm/svm.h | 2 +-
> 2 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index 6df486bb1ac4..cdbce20989b8 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -136,6 +136,13 @@ static const struct svm_direct_access_msrs {
> { .index = X2APIC_MSR(APIC_TMICT), .always = false },
> { .index = X2APIC_MSR(APIC_TMCCT), .always = false },
> { .index = X2APIC_MSR(APIC_TDCR), .always = false },
> + { .index = MSR_IA32_U_CET, .always = false },
> + { .index = MSR_IA32_S_CET, .always = false },
> + { .index = MSR_IA32_INT_SSP_TAB, .always = false },
> + { .index = MSR_IA32_PL0_SSP, .always = false },
> + { .index = MSR_IA32_PL1_SSP, .always = false },
> + { .index = MSR_IA32_PL2_SSP, .always = false },
> + { .index = MSR_IA32_PL3_SSP, .always = false },
> { .index = MSR_INVALID, .always = false },
> };
>
> @@ -1181,6 +1188,16 @@ static inline void init_vmcb_after_set_cpuid(struct kvm_vcpu *vcpu)
> set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_EIP, 1, 1);
> set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SYSENTER_ESP, 1, 1);
> }
> +
> + if (kvm_cet_user_supported() && guest_cpuid_has(vcpu, X86_FEATURE_SHSTK)) {
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_U_CET, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_S_CET, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_INT_SSP_TAB, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PL0_SSP, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PL1_SSP, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PL2_SSP, 1, 1);
> + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PL3_SSP, 1, 1);
> + }

This is wrong, KVM needs to set/clear interception based on SHSKT, i.e. it can't
be a one-way street. Userspace *probably* won't toggle SHSTK in guest CPUID, but
weirder things have happened.

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