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    Subject[PATCH v4 08/12] ASoC: cs35l56: Make common function for control port wait
    Date
    From: Simon Trimmer <simont@opensource.cirrus.com>

    Move the waits for CS35L56_CONTROL_PORT_READY_US into a common
    function, and also allow a wider range of allowed wait times.

    Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com>
    Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
    Acked-by: Mark Brown <broonie@kernel.org>
    ---
    include/sound/cs35l56.h | 1 +
    sound/soc/codecs/cs35l56-shared.c | 16 ++++++++++------
    2 files changed, 11 insertions(+), 6 deletions(-)

    diff --git a/include/sound/cs35l56.h b/include/sound/cs35l56.h
    index 489a61f84325..ae9e8f55962a 100644
    --- a/include/sound/cs35l56.h
    +++ b/include/sound/cs35l56.h
    @@ -275,6 +275,7 @@ extern const unsigned int cs35l56_tx_input_values[CS35L56_NUM_INPUT_SRC];
    void cs35l56_reread_firmware_registers(struct cs35l56_base *cs35l56_base);
    int cs35l56_mbox_send(struct cs35l56_base *cs35l56_base, unsigned int command);
    int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base);
    +void cs35l56_wait_control_port_ready(void);
    void cs35l56_wait_min_reset_pulse(void);
    void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire);
    int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq);
    diff --git a/sound/soc/codecs/cs35l56-shared.c b/sound/soc/codecs/cs35l56-shared.c
    index e3b935bd9037..7e02d023338c 100644
    --- a/sound/soc/codecs/cs35l56-shared.c
    +++ b/sound/soc/codecs/cs35l56-shared.c
    @@ -249,6 +249,13 @@ int cs35l56_wait_for_firmware_boot(struct cs35l56_base *cs35l56_base)
    }
    EXPORT_SYMBOL_NS_GPL(cs35l56_wait_for_firmware_boot, SND_SOC_CS35L56_SHARED);

    +void cs35l56_wait_control_port_ready(void)
    +{
    + /* Wait for control port to be ready (datasheet tIRS). */
    + usleep_range(CS35L56_CONTROL_PORT_READY_US, 2 * CS35L56_CONTROL_PORT_READY_US);
    +}
    +EXPORT_SYMBOL_NS_GPL(cs35l56_wait_control_port_ready, SND_SOC_CS35L56_SHARED);
    +
    void cs35l56_wait_min_reset_pulse(void)
    {
    /* Satisfy minimum reset pulse width spec */
    @@ -275,7 +282,7 @@ void cs35l56_system_reset(struct cs35l56_base *cs35l56_base, bool is_soundwire)
    if (is_soundwire)
    return;

    - usleep_range(CS35L56_CONTROL_PORT_READY_US, CS35L56_CONTROL_PORT_READY_US + 400);
    + cs35l56_wait_control_port_ready();
    regcache_cache_only(cs35l56_base->regmap, false);
    }
    EXPORT_SYMBOL_NS_GPL(cs35l56_system_reset, SND_SOC_CS35L56_SHARED);
    @@ -486,8 +493,7 @@ int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_sou
    cs35l56_hibernate_wake_seq,
    ARRAY_SIZE(cs35l56_hibernate_wake_seq));

    - usleep_range(CS35L56_CONTROL_PORT_READY_US,
    - CS35L56_CONTROL_PORT_READY_US + 400);
    + cs35l56_wait_control_port_ready();
    }

    out_sync:
    @@ -561,9 +567,7 @@ int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)
    if (!cs35l56_base->reset_gpio)
    regmap_read(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, &devid);

    - /* Wait for control port to be ready (datasheet tIRS). */
    - usleep_range(CS35L56_CONTROL_PORT_READY_US,
    - CS35L56_CONTROL_PORT_READY_US + 400);
    + cs35l56_wait_control_port_ready();

    /*
    * The HALO_STATE register is in different locations on Ax and B0
    --
    2.30.2
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