Messages in this thread | | | Date | Wed, 31 May 2023 08:34:02 +0000 | From | Charles Keepax <> | Subject | Re: [PATCH v2 5/6] spi: cs42l43: Add SPI controller support |
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On Tue, May 30, 2023 at 10:30:46PM +0100, Mark Brown wrote: > On Tue, May 30, 2023 at 01:21:11PM +0100, Charles Keepax wrote: > > A couple of small things: > > > +static unsigned int cs42l43_clock_divs[16] = { > > + 2, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30 > > +}; > > Do we need to specify the size of the array? I just had to count the > number of initialisers :( Should probably also be const. > > > + for (; buf < block - (sizeof(u32) - 1); buf += sizeof(u32)) > > + regmap_write(regmap, CS42L43_TX_DATA, *(const u32 *)buf); > > We're passing a byte stream through a u32 here - are you sure this is > endian safe?
Ah shoot, yeah Andy made some comments on this that seem to have got lost in my mass of fixups. I will fixup for a v3.
Thanks, Charles
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