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Subject[PATCH 0/2] MT8192/95: Set correct MSDCPLL rate
Date
This series improves both stability/reliability and performance for
eMMC and SD cards on MT8192 and MT8195, where the PLL may be set at
a sub-optimal rate from the bootloader.

This was tested on MT8192 Asurada Spherion and MT8195 Cherry Tomato
Chromebooks.

AngeloGioacchino Del Regno (2):
arm64: dts: mediatek: mt8192: Make sure MSDCPLL's rate is 400MHz
arm64: dts: mediatek: mt8195: Make sure MSDCPLL's rate is 400MHz

arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 ++
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 ++
2 files changed, 4 insertions(+)

--
2.40.1

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