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SubjectRe: [PATCH V3 3/6] coresight: etm4x: Drop pid argument from etm4_probe()
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On 5/19/23 18:08, Suzuki K Poulose wrote:
> On 19/05/2023 06:21, Anshuman Khandual wrote:
>> Coresight device pid can be retrieved from its iomem base address, which is
>> stored in 'struct etm4x_drvdata'. This drops pid argument from etm4_probe()
>> and 'struct etm4_init_arg'. Instead etm4_check_arch_features() derives the
>> coresight device pid with a new helper coresight_get_pid(), right before it
>> is consumed in etm4_hisi_match_pid().
>>
>> Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Cc: Mike Leach <mike.leach@linaro.org>
>> Cc: Leo Yan <leo.yan@linaro.org>
>> Cc: coresight@lists.linaro.org
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> ---
>>   .../coresight/coresight-etm4x-core.c          | 29 ++++++++++---------
>>   include/linux/coresight.h                     | 12 ++++++++
>>   2 files changed, 27 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> index 748d2ef53cb0..914ef6eb85d1 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>> @@ -66,7 +66,6 @@ static u64 etm4_get_access_type(struct etmv4_config *config);
>>   static enum cpuhp_state hp_online;
>>     struct etm4_init_arg {
>> -    unsigned int        pid;
>>       struct device        *dev;
>>       struct csdev_access    *csa;
>>   };
>> @@ -370,9 +369,17 @@ static void etm4_disable_arch_specific(struct etmv4_drvdata *drvdata)
>>   }
>>     static void etm4_check_arch_features(struct etmv4_drvdata *drvdata,
>> -                      unsigned int id)
>> +                     struct csdev_access *csa)
>>   {
>> -    if (etm4_hisi_match_pid(id))
>> +    /*
>> +     * coresight_get_pid() fetches device PID from the iomem
>> +     * register based accesses, which cannot be performed on
>> +     * system instruction based devices.
>> +     */
>
> Minor nit: Please fix the comment to say something like :
>
>     /*
>      * TRCPIDR* registers are not required for ETMs with system
>      * instructions. They must be identified by the MIDR+REVIDRs.
>      * Skip the TRCPID checks for now.
>      */
>
> Rest looks good to me.

Will change the in-code comment as suggested.

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