Messages in this thread | | | Date | Thu, 18 May 2023 12:01:39 +0800 | Subject | Re: [PATCH v8 2/6] KVM: x86: Virtualize CR4.LAM_SUP | From | Binbin Wu <> |
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On 5/12/2023 6:49 PM, Huang, Kai wrote: >>>> >>> LAM only applies to 64-bit linear address, which means LAM can only be enabled >>> when CPU is in 64-bit mode with either 4-level or 5-level paging enabled. >>> >>> What's the hardware behaviour if we set CR4.LAM_SUP when CPU isn't in 64-bit >>> mode? And how does VMENTRY check GUEST_CR4.LAM_SUP and 64-bit mode? >>> >>> Looks they are not clear in the spec you pasted in the cover letter: >>> >>> https://cdrdv2.intel.com/v1/dl/getContent/671368 >>> >>> Or I am missing something? >> Yes, it is not clearly described in LAM spec. >> Had some internal discussions and also did some tests in host, >> if the processor supports LAM, CR4.LAM_SUP is allowed to be set even >> when cpu isn't in 64bit mode. >> >> There was a statement in commit message of the last version, but I >> missed it in this version. I'll add it back. >> "CR4.LAM_SUP is allowed to be set even not in 64-bit mode, but it will not >> take effect since LAM only applies to 64-bit linear address." > Yeah this does help. Please add it back to the changelog. > >> Also, I will try to ask Intel guys if it's possible to update the document. >> > Thanks.
Per the internal discussion, there is no need to explicitly callout CR4[28] can be set out side of 64-bit mode in SDM/LAM spec for the following reasons:
According to SDM Vol.2 Move to/from Control Registers: - "On a 64-bit capable processor, an execution of MOV to CR outside of 64-bit mode zeros the upper 32 bits of the control register." It doesn't mention of clearing any of the lower bits.
- "Some of the bits in CR0, CR3, and CR4 are reserved and must be written with zeros. ... Attempting to set any reserved bits in CR4 results in #GP(0)" CR4[28] is not reserved on processors that support LAM, and SDM / LAM spec doesn't explicitly say the bit cannot be set under some specific condition.
So just like the reset of CR4[31:0], CR4[28] can be set by any 32-bit load of CR4 when LAM is supported. For example, CR4[17] is used only with 64-bit paging, but it can be set by a 32-bit load of CR4 when 32-bit paging or PAE paging is in use. Similarly, user-interrupt delivery is enabled by setting CR4[25]. It can be set in any mode, even though user-interrupt delivery can occur only in 64-bit mode.
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