Messages in this thread |  | | Date | Tue, 16 May 2023 11:40:48 +0200 | | From | Peter Zijlstra <> | | Subject | Re: [RFC PATCH V6 03/14] x86/sev: Add AMD sev-snp enlightened guest support on hyperv |
| |
On Mon, May 15, 2023 at 12:59:05PM -0400, Tianyu Lan wrote: > From: Tianyu Lan <tiala@microsoft.com> > > Enable #HV exception to handle interrupt requests from hypervisor. > > Co-developed-by: Lendacky Thomas <thomas.lendacky@amd.com> > Co-developed-by: Kalra Ashish <ashish.kalra@amd.com> > Signed-off-by: Tianyu Lan <tiala@microsoft.com> > --- > Change since RFC V5: > * Merge patch "x86/sev: Fix interrupt exit code paths from > #HV exception" with this commit. > > Change since RFC V3: > * Check NMI event when irq is disabled. > * Remove redundant variable > --- > arch/x86/include/asm/idtentry.h | 12 +- > arch/x86/include/asm/mem_encrypt.h | 2 + > arch/x86/include/uapi/asm/svm.h | 4 + > arch/x86/kernel/sev.c | 349 ++++++++++++++++++++++++----- > arch/x86/kernel/traps.c | 2 + > 5 files changed, 310 insertions(+), 59 deletions(-) > > diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h > index b0f3501b2767..867073ccf1d1 100644 > --- a/arch/x86/include/asm/idtentry.h > +++ b/arch/x86/include/asm/idtentry.h > @@ -13,6 +13,12 @@ > > #include <asm/irq_stack.h> > > +#ifdef CONFIG_AMD_MEM_ENCRYPT > +noinstr void irqentry_exit_hv_cond(struct pt_regs *regs, irqentry_state_t state); > +#else > +#define irqentry_exit_hv_cond(regs, state) irqentry_exit(regs, state) > +#endif > + > /** > * DECLARE_IDTENTRY - Declare functions for simple IDT entry points > * No error code pushed by hardware > @@ -201,7 +207,7 @@ __visible noinstr void func(struct pt_regs *regs, \ > kvm_set_cpu_l1tf_flush_l1d(); \ > run_irq_on_irqstack_cond(__##func, regs, vector); \ > instrumentation_end(); \ > - irqentry_exit(regs, state); \ > + irqentry_exit_hv_cond(regs, state); \ > } \ > \ > static noinline void __##func(struct pt_regs *regs, u32 vector) > @@ -241,7 +247,7 @@ __visible noinstr void func(struct pt_regs *regs) \ > kvm_set_cpu_l1tf_flush_l1d(); \ > run_sysvec_on_irqstack_cond(__##func, regs); \ > instrumentation_end(); \ > - irqentry_exit(regs, state); \ > + irqentry_exit_hv_cond(regs, state); \ > } \ > \ > static noinline void __##func(struct pt_regs *regs) > @@ -270,7 +276,7 @@ __visible noinstr void func(struct pt_regs *regs) \ > __##func (regs); \ > __irq_exit_raw(); \ > instrumentation_end(); \ > - irqentry_exit(regs, state); \ > + irqentry_exit_hv_cond(regs, state); \ > } \ > \ > static __always_inline void __##func(struct pt_regs *regs)
WTF is this supposed to do and why is this the right way to achieve the desired result?
Your changelog gives me 0 clues -- guess how much I then care about your patches?
|  |