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    Subject[RFC PATCH v2 net-next 01/14] net: dsa: mt7530: fix comments regarding port 5 and 6 for both switches
    Date
    From: Arınç ÜNAL <arinc.unal@arinc9.com>

    There's no logic to numerically order the CPU ports. State the port number
    and its being a CPU port instead.

    Remove the irrelevant PHY muxing information from
    mt7530_mac_port_get_caps(). Explain the supported MII modes instead.

    Remove the out of place PHY muxing information from
    mt753x_phylink_mac_config(). The function is for both the MT7530 and MT7531
    switches but there's no phy muxing on MT7531.

    These comments were gradually introduced with the commits below.
    ca366d6c889b ("net: dsa: mt7530: Convert to PHYLINK API")
    38f790a80560 ("net: dsa: mt7530: Add support for port 5")
    88bdef8be9f6 ("net: dsa: mt7530: Extend device data ready for adding a new
    hardware")
    c288575f7810 ("net: dsa: mt7530: Add the support of MT7531 switch")

    Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
    ---
    drivers/net/dsa/mt7530.c | 12 ++++++------
    1 file changed, 6 insertions(+), 6 deletions(-)

    diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
    index e4bb5037d352..31ef70f0cd12 100644
    --- a/drivers/net/dsa/mt7530.c
    +++ b/drivers/net/dsa/mt7530.c
    @@ -2506,7 +2506,7 @@ static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
    config->supported_interfaces);
    break;

    - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
    + case 5: /* Port 5, a CPU port, supports rgmii, mii, and gmii. */
    phy_interface_set_rgmii(config->supported_interfaces);
    __set_bit(PHY_INTERFACE_MODE_MII,
    config->supported_interfaces);
    @@ -2514,7 +2514,7 @@ static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
    config->supported_interfaces);
    break;

    - case 6: /* 1st cpu port */
    + case 6: /* Port 6, a CPU port, supports rgmii and trgmii. */
    __set_bit(PHY_INTERFACE_MODE_RGMII,
    config->supported_interfaces);
    __set_bit(PHY_INTERFACE_MODE_TRGMII,
    @@ -2539,14 +2539,14 @@ static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
    config->supported_interfaces);
    break;

    - case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
    + case 5: /* Port 5, a CPU port, supports rgmii and sgmii/802.3z. */
    if (mt7531_is_rgmii_port(priv, port)) {
    phy_interface_set_rgmii(config->supported_interfaces);
    break;
    }
    fallthrough;

    - case 6: /* 1st cpu port supports sgmii/8023z only */
    + case 6: /* Port 6, a CPU port, supports sgmii/802.3z only. */
    __set_bit(PHY_INTERFACE_MODE_SGMII,
    config->supported_interfaces);
    __set_bit(PHY_INTERFACE_MODE_1000BASEX,
    @@ -2738,7 +2738,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
    state->interface != PHY_INTERFACE_MODE_INTERNAL)
    goto unsupported;
    break;
    - case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
    + case 5: /* Port 5, a CPU port. */
    if (priv->p5_interface == state->interface)
    break;

    @@ -2748,7 +2748,7 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
    if (priv->p5_intf_sel != P5_DISABLED)
    priv->p5_interface = state->interface;
    break;
    - case 6: /* 1st cpu port */
    + case 6: /* Port 6, a CPU port. */
    if (priv->p6_interface == state->interface)
    break;

    --
    2.37.2
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