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SubjectRe: [PATCH v2 07/13] drm/msm/dpu: Add SM6350 support
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On 27/04/2023 18:37, Marijn Suijten wrote:
> On 2023-04-21 00:31:16, Konrad Dybcio wrote:
>> Add SM6350 support to the DPU1 driver to enable display output.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> After addressing the comments from Dmitry (CURSOR0->DMA1 and
> CURSOR1->DMA2), this is:
>
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
>
> See below for some nits.
>
>> ---
>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h | 191 +++++++++++++++++++++
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 3 +
>> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 +
>> 4 files changed, 196 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
>> new file mode 100644
>> index 000000000000..687a508cbaa6
>> --- /dev/null
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
>> @@ -0,0 +1,191 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved.
>> + * Copyright (c) 2015-2018, 2020 The Linux Foundation. All rights reserved.
>> + * Copyright (c) 2023, Linaro Limited
>> + */
>> +
>> +#ifndef _DPU_6_4_SM6350_H
>> +#define _DPU_6_4_SM6350_H
>> +
>> +static const struct dpu_caps sm6350_dpu_caps = {
>> + .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
>> + .max_mixer_blendstages = 0x7,
>> + .qseed_type = DPU_SSPP_SCALER_QSEED4,
>
> I thought it was QSEED3LITE, but doesn't really matter as both are
> handled similarly. It'll anyway change when I resubmit:

If I understood correctly, we mixed two things: hw stuff and the
userspace library. QSEEDv2 was a hardware scaler. "qseedv3/v3lite/v4"
are software library names that are used with the scalers newer than
QSEED2. From the driver point we can ignore that and use scaler's hw
version (which mostly but not always corresponds to the 3/3lite/4).

>
> https://lore.kernel.org/linux-arm-msm/20230215-sspp-scaler-version-v1-0-416b1500b85b@somainline.org/T/#u
>
> which should hardcode the register value directly, making this field
> superfluous.
>
>> + .has_src_split = true,
>> + .has_dim_layer = true,
>> + .has_idle_pc = true,
>> + .max_linewidth = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
>> + .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
>> +};

--
With best wishes
Dmitry

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