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SubjectRe: [PATCH 5/5] arm64: dts: mediatek: cherry-tomato-r1: Enable NVMe PCI-Express port
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Il 21/04/23 09:59, Chen-Yu Tsai ha scritto:
> On Thu, Apr 20, 2023 at 5:45 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@collabora.com> wrote:
>>
>> On Tomato rev1 the PCIe0 controller is used for NVMe storage.
>
> This was slightly confusing for me. AFAIK rev1 is not an actual Tomato
> device. It should be the prototype board, which is the original Cherry
> reference design by Google [1].
>
> There is an actual Cherry derived device that has NVMe, though it's under
> another brand and another name.
>

If revision 1 is not an actual Tomato device, and you can confirm that it is
the prototype board... I can send a commit to entirely drop R1 as having it
upstream would be of no use at all.

Cheers,
Angelo

> ChenYu
>
> [1] Much like Kukui & Jacuzzi (MT8183), and Asurada (MT8192) are the
> reference designs. I don't think we ever upstream the reference
> boards because they don't really end up in the hands of people
> outside of the project, and the ones we do have tend to be quite
> beaten up or no longer working due to extensive testing.
>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>> arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts | 7 +++++++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
>> index 2d5e8f371b6d..11fc83ddf236 100644
>> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
>> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry-tomato-r1.dts
>> @@ -20,6 +20,13 @@ &sound {
>> model = "mt8195_r1019_5682";
>> };
>>
>> +&pcie0 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&pcie0_pins_default>;
>> +};
>> +
>> &ts_10 {
>> status = "okay";
>> };
>> --
>> 2.40.0
>>
>>

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