Messages in this thread | | | From | Sai Krishna Gajula <> | Subject | Re: [net PATCH v2 1/7] octeontx2-af: Secure APR table update with the lock | Date | Mon, 10 Apr 2023 08:25:25 +0000 |
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Please see inline,
> -----Original Message----- > From: Simon Horman <simon.horman@corigine.com> > Sent: Saturday, April 8, 2023 8:03 PM > To: Sai Krishna Gajula <saikrishnag@marvell.com> > Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org; > pabeni@redhat.com; netdev@vger.kernel.org; linux- > kernel@vger.kernel.org; Sunil Kovvuri Goutham <sgoutham@marvell.com>; > Geethasowjanya Akula <gakula@marvell.com>; richardcochran@gmail.com; > Linu Cherian <lcherian@marvell.com>; Jerin Jacob Kollanukkaran > <jerinj@marvell.com>; Hariprasad Kelam <hkelam@marvell.com>; > Subbaraya Sundeep Bhatta <sbhatta@marvell.com> > Subject: Re: [net PATCH v2 1/7] octeontx2-af: Secure APR table update > with the lock > > On Fri, Apr 07, 2023 at 05:53:38PM +0530, Sai Krishna wrote: > > From: Geetha sowjanya <gakula@marvell.com> > > > > APR table contains the lmtst base address of PF/VFs. > > These entries are updated by the PF/VF during the device probe. Due to > > race condition while updating the entries are getting corrupted. Hence > > secure the APR table update with the lock. > > Hi Sai, Geetha, > > I think it would be useful to describe what races with > rvu_mbox_handler_lmtst_tbl_setup().
We will rewrite comment message and submit v3 patch.
Thanks, Sai > > ...
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