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SubjectRe: [PATCH v3 11/34] ia64: Implement the new page table range API
On Fri, Mar 03, 2023 at 01:56:36PM +0200, Mike Rapoport wrote:
> On Tue, Feb 28, 2023 at 09:37:14PM +0000, Matthew Wilcox (Oracle) wrote:
> > void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
> > {
> > - unsigned long pfn = PHYS_PFN(paddr);
> > + struct folio *folio = page_folio(phys_to_page(paddr));
> > + ssize_t left = size;
> > + size_t offset = offset_in_folio(folio, paddr);
>
> Build of defconfig failed miserably for me without this:
>
> diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c
> index 12aef25944aa..0775e7870257 100644
> --- a/arch/ia64/mm/init.c
> +++ b/arch/ia64/mm/init.c
> @@ -69,7 +69,8 @@ __ia64_sync_icache_dcache (pte_t pte)
> */
> void arch_dma_mark_clean(phys_addr_t paddr, size_t size)
> {
> - struct folio *folio = page_folio(phys_to_page(paddr));
> + unsigned long pfn = __phys_to_pfn(paddr);
> + struct folio *folio = page_folio(pfn_to_page(pfn));

Huh, TIL that only some architectures have phys_to_page(). Thanks.
I'm going to use PHYS_PFN instead of __phys_to_pfn just to reduce the
diff.

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