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Subject[PATCH v2 10/11] x86/tsc: Mark Secure TSC as reliable clocksource
Date
AMD SNP guests may have Secure TSC feature enabled. Secure TSC as
clocksource is wrongly marked as unstable, mark Secure TSC as
reliable.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/kernel/tsc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 344698852146..5f1e2b51ae3b 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -1221,7 +1221,7 @@ static void __init check_system_tsc_reliable(void)
tsc_clocksource_reliable = 1;
}
#endif
- if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE))
+ if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || cc_platform_has(CC_ATTR_GUEST_SECURE_TSC))
tsc_clocksource_reliable = 1;

/*
--
2.34.1
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