Messages in this thread | | | Date | Sun, 19 Mar 2023 18:32:03 -0700 | From | Nicolin Chen <> | Subject | Re: [PATCH v1 14/14] iommu/arm-smmu-v3: Add arm_smmu_cache_invalidate_user |
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On Thu, Mar 16, 2023 at 02:09:08PM -0700, Nicolin Chen wrote: > On Thu, Mar 16, 2023 at 02:58:39PM +0000, Robin Murphy wrote: > > > > > > > I really think UAPI should reflect the hardware and encode TG and TTL > > > > > > directly. Especially since there's technically a flaw in the current > > > > > > driver where we assume TTL in cases where it isn't actually known, thus > > > > > > may potentially fail to invalidate level 2 block entries when removing a > > > > > > level 1 table, since io-pgtable passes the level 3 granule in that case. > > > > > > > > > > Do you mean something like hw_info forwarding pgsize_bitmap/tg > > > > > to the guest? Or the other direction? > > > > > > > > I mean if the interface wants to support range invalidations in a way > > > > which works correctly, then it should ideally carry both the TG and TTL > > > > fields from the guest command straight through to the host. If not, then > > > > at the very least the host must always assume TTL=0, because it cannot > > > > correctly infer otherwise once the guest command's original intent has > > > > been lost. > > > > > > Oh, it's about hypervisor simply forwarding the entire CMD to > > > the host side. Jason is suggesting a fast approach by letting > > > host kernel read the CMDQ directly to get the raw CMD. Perhaps > > > that would address this comments about TG/TTL too. > > > > That did cross my mind, but given the usage model, having host userspace > > give guest memory whose contents it can't control (unless it pauses the > > whole VM on all CPUs) directly to the host kernel just seems to invite > > more potential problems than necessary. Commands aren't big, so I think > > it's fair to expect the VMM to marshal them into host memory, and save > > the host kernel from ever having to reason about any races or other > > emulation details which may exist between a VM and its VMM. > > An invalidation ioctl is synchronously executed from the top > level in QEMU when it traps any CMDQ_PROD write. So, either > packing the fields of a command into a data structure or just > forwarding the command directly, it seems to be the same for > the matter of worrying about race conditions?
I think I misread your reply here :)
What you suggested is exactly forwarding the command v.s. host reading guest's command queue memory.
Although I haven't fully got what Jason's "sorting" approach, this could already simplify the data structure holding all the fields, by passing a "__u64 cmds[2]" alone. A sample code:
+struct iommu_hwpt_invalidate_arm_smmuv3 { + struct iommu_iova_range range; + __u64 cmd[2]; +};
then...
+ cmd[0] = inv_info->cmd[0]; + cmd[1] = inv_info->cmd[1]; + switch (cmd[0] & 0xff) { + case CMDQ_OP_TLBI_NSNH_ALL: + cmd[0] &= ~0xffULL; + cmd[0] |= CMDQ_OP_TLBI_NH_ALL; + fallthrough; + case CMDQ_OP_TLBI_NH_VA: + case CMDQ_OP_TLBI_NH_VAA: + case CMDQ_OP_TLBI_NH_ALL: + case CMDQ_OP_TLBI_NH_ASID: + cmd[0] &= ~CMDQ_TLBI_0_VMID; + cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, smmu_domain->s2->s2_cfg.vmid); + arm_smmu_cmdq_issue_cmdlist(smmu, cmd, 1, true); + break; + case CMDQ_OP_CFGI_CD: + case CMDQ_OP_CFGI_CD_ALL: + arm_smmu_sync_cd(smmu_domain, + FIELD_GET(CMDQ_CFGI_0_SSID, cmd[0]), false); + break; + default: + return; + }
We could probably do a batch forwarding to if it's worthy?
Thanks Nic
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