Messages in this thread | | | Date | Tue, 7 Feb 2023 10:17:20 +0100 | Subject | Re: [PATCH v1 13/45] clk: mediatek: mt8167: Compress GATE_TOPx macros | From | AngeloGioacchino Del Regno <> |
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Il 07/02/23 08:30, Chen-Yu Tsai ha scritto: > On Mon, Feb 6, 2023 at 11:30 PM AngeloGioacchino Del Regno > <angelogioacchino.delregno@collabora.com> wrote: >> >> Use the GATE_MTK macro to compress the GATE_TOP{0..5} macros. >> No functional changes. >> >> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> >> --- >> drivers/clk/mediatek/clk-mt8167.c | 88 +++++++++---------------------- >> 1 file changed, 24 insertions(+), 64 deletions(-) >> >> diff --git a/drivers/clk/mediatek/clk-mt8167.c b/drivers/clk/mediatek/clk-mt8167.c >> index 91669ebafaf9..97a443fdfc77 100644 >> --- a/drivers/clk/mediatek/clk-mt8167.c >> +++ b/drivers/clk/mediatek/clk-mt8167.c >> @@ -736,77 +736,37 @@ static const struct mtk_gate_regs top5_cg_regs = { >> .sta_ofs = 0x44, >> }; >> >> -#define GATE_TOP0(_id, _name, _parent, _shift) { \ >> - .id = _id, \ >> - .name = _name, \ >> - .parent_name = _parent, \ >> - .regs = &top0_cg_regs, \ >> - .shift = _shift, \ >> - .ops = &mtk_clk_gate_ops_setclr, \ >> - } >> +#define GATE_TOP0(_id, _name, _parent, _shift) \ >> + GATE_MTK(_id, _name, _parent, &top0_cg_regs, \ >> + _shift, &mtk_clk_gate_ops_setclr) > > Nit: 100 characters should be enough to fit the whole GATE_MTK part in one > line. >
Wanted to stay below 90, but there's effectively no real reason to do that, so let's go to 100 cols!
> Otherwise, > > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Cheers, Angelo
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