Messages in this thread | | | Date | Wed, 8 Feb 2023 11:00:07 +0800 | Subject | Re: [PATCH V6] PCI: loongson: Skip scanning disabled child devices | From | Binbin Zhou <> |
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在 2022/11/17 10:09, Liu Peibao 写道: > Add a mechanism to disable on chip PCI devices by DT. Typically, when there > are pins shareable between the platform device and the on chip PCI device, > if the PCI device is not preferred, add `status = "disabled"` property to > this PCI device DT node. > > For example, on LS2K1000, GMAC1 (on chip PCI device) and GPIO (platform > device, not PCI device) 14 share the same pin. If GMAC1 is not preferred, > add `status = "disabled"` property in GMAC1 DT node. > > Signed-off-by: Liu Peibao <liupeibao@loongson.cn> Tested-by: Binbin Zhou <zhoubinbin@loongson.cn> > --- > V5 -> V6: 1. rewrite the commit log to make things clear. > 2. replace "unavailable" as "disabled" in patch subject. > V4 -> V5: clear the issue we are facing in commit log. > V3 -> V4: 1. get rid of the masklist and search the status property > directly. > 2. check the status property only when accessing the vendor ID. > V2 -> V3: 1. use list_for_each_entry() for more clearly. > 2. fix wrong use of sizeof(). > V1 -> V2: use existing property "status" instead of adding new property. > > drivers/pci/controller/pci-loongson.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/pci/controller/pci-loongson.c b/drivers/pci/controller/pci-loongson.c > index 05c50408f13b..efca0b3b5a29 100644 > --- a/drivers/pci/controller/pci-loongson.c > +++ b/drivers/pci/controller/pci-loongson.c > @@ -194,6 +194,17 @@ static void __iomem *pci_loongson_map_bus(struct pci_bus *bus, > return NULL; > } > > +#ifdef CONFIG_OF > + /* Don't access disabled devices. */ > + if (pci_is_root_bus(bus) && where == PCI_VENDOR_ID) { > + struct device_node *dn; > + > + dn = of_pci_find_child_device(bus->dev.of_node, devfn); > + if (dn && !of_device_is_available(dn)) > + return NULL; > + } > +#endif > + > /* CFG0 can only access standard space */ > if (where < PCI_CFG_SPACE_SIZE && priv->cfg0_base) > return cfg0_map(priv, bus, devfn, where);
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