Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | From | "H. Nikolaus Schaller" <> | Subject | [RFC 1/3] MIPS: DTS: jz4780: add #clock-cells to rtc_dev | Date | Wed, 15 Feb 2023 18:31:56 +0100 |
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This makes the driver present the clk32k signal if requested. It is needed to clock the PMU of the BCM4330 WiFi and Bluetooth module of the CI20 board.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com> --- arch/mips/boot/dts/ingenic/jz4780.dtsi | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index c182a656d63bc..18affff85ce38 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -155,6 +155,8 @@ rtc_dev: rtc@10003000 { clocks = <&cgu JZ4780_CLK_RTCLK>; clock-names = "rtc"; + + #clock-cells = <0>; }; pinctrl: pin-controller@10010000 { -- 2.38.1
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