Messages in this thread | | | Date | Thu, 7 Dec 2023 20:50:05 -0500 | From | Guo Ren <> | Subject | Re: [PATCH] riscv: Fix SMP when shadow call stacks are enabled |
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On Fri, Dec 01, 2023 at 09:40:55AM -0800, Sami Tolvanen wrote: > Hi Samuel, > > On Tue, Nov 21, 2023 at 1:20 PM Samuel Holland > <samuel.holland@sifive.com> wrote: > > > > This fixes two bugs in SCS initialization for secondary CPUs. First, > > the SCS was not initialized at all in the spinwait boot path. Second, > > the code for the SBI HSM path attempted to initialize the SCS before > > enabling the MMU. However, that involves dereferencing the thread > > pointer, which requires the MMU to be enabled. > > > > Fix both issues by setting up the SCS in the common secondary entry > > path, after enabling the MMU. > > Thanks for the patch! Looks like my qemu setup doesn't hit this issue, > but nevertheless, the fix looks good to me. Because there is no function call in relocate_enable_mmu :)
> > Reviewed-by: Sami Tolvanen <samitolvanen@google.com> > > Sami > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
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