Messages in this thread Patch in this message | | | From | Cristian Ciocaltea <> | Subject | [PATCH v3 6/9] riscv: dts: starfive: visionfive-v1: Setup ethernet phy | Date | Fri, 15 Dec 2023 22:40:45 +0200 |
| |
The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires manual adjustment of the RX internal delay to work properly.
The default RX delay provided by the driver is 1.95 ns, which proves to be too high. Applying a 50% reduction seems to mitigate the issue.
Also note this adjustment is not necessary on BeagleV Starlight SBC, which uses a Microchip PHY. Hence, there is no indication of a miss-behaviour on the GMAC side, but most likely the issue stems from the Motorcomm PHY.
Co-developed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> --- .../boot/dts/starfive/jh7100-starfive-visionfive-v1.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts index e82af72f1aaf..ca134b9f11bf 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts +++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts @@ -18,3 +18,10 @@ gpio-restart { priority = <224>; }; }; + +&mdio { + phy: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <900>; + }; +}; -- 2.43.0
| |