Messages in this thread | | | Date | Tue, 12 Dec 2023 10:31:02 +0100 | Subject | Re: [PATCH v5 4/5] clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 | From | AngeloGioacchino Del Regno <> |
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Il 12/12/23 04:19, Daniel Golle ha scritto: > From: Sam Shih <sam.shih@mediatek.com> > > Introduce pcw_chg_bit member to struct mtk_pll_data and use it instead > of the previously hardcoded PCW_CHG_MASK macro if set. > This will needed for clocks on the MT7988 SoC. > > Signed-off-by: Sam Shih <sam.shih@mediatek.com> > Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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