lkml.org 
[lkml]   [2023]   [Dec]   [11]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH v2] PCI: Extend PCI root port device IDs for Zhaoxin platforms
Date
From: LeoLiuoc <LeoLiu-oc@zhaoxin.com>

Add more PCI root port device IDs to the
pci_quirk_zhaoxin_pcie_ports_acs() for some new Zhaoxin platforms.

v1 -> v2:
1. Add a note to indicate future Zhaoxin devices will implement ACS
Capability based on the PCIe Spec.
2. Includes DID of more Zhaoxin devices that have not yet implemented ACS
Capability.

Signed-off-by: LeoLiuoc <LeoLiu-oc@zhaoxin.com>
---
drivers/pci/quirks.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index ea476252280a..f4546590d9e3 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4706,10 +4706,14 @@ static int pci_quirk_zhaoxin_pcie_ports_acs(struct pci_dev *dev, u16 acs_flags)
(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
return -ENOTTY;

+ /*
+ * Future Zhaoxin Root Ports and Switch Downstream Ports will implement ACS
+ * capability in accordance with the PCIe Spec.
+ */
switch (dev->device) {
case 0x0710 ... 0x071e:
case 0x0721:
- case 0x0723 ... 0x0732:
+ case 0x0723 ... 0x0752:
return pci_acs_ctrl_enabled(acs_flags,
PCI_ACS_SV | PCI_ACS_RR | PCI_ACS_CR | PCI_ACS_UF);
}
--
2.34.1
\
 
 \ /
  Last update: 2023-12-11 10:16    [W:0.044 / U:0.388 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site