Messages in this thread | | | From | JeeHeng Sia <> | Subject | RE: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes | Date | Tue, 12 Dec 2023 02:51:15 +0000 |
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> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Saturday, December 9, 2023 1:58 AM > To: Emil Renner Berthing <emil.renner.berthing@canonical.com>; JeeHeng Sia <jeeheng.sia@starfivetech.com>; kernel@esmil.dk; > conor@kernel.org; robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; paul.walmsley@sifive.com; palmer@dabbelt.com; > aou@eecs.berkeley.edu; mturquette@baylibre.com; sboyd@kernel.org; p.zabel@pengutronix.de; Hal Feng > <hal.feng@starfivetech.com>; Xingyu Wu <xingyu.wu@starfivetech.com> > Cc: linux-riscv@lists.infradead.org; devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-clk@vger.kernel.org; Leyfoon Tan > <leyfoon.tan@starfivetech.com> > Subject: Re: [PATCH v1 16/16] riscv: dts: starfive: jh8100: Add clocks and resets nodes > > On 08/12/2023 17:39, Emil Renner Berthing wrote: > > Sia Jee Heng wrote: > >> Add SYSCRG/SYSCRG-NE/SYSCRG-NW/SYSCRG-SW/AONCRG clock and reset > >> nodes for JH8100 RISC-V SoC. > >> > >> Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> > >> Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com> > >> --- > >> arch/riscv/boot/dts/starfive/jh8100-clk.dtsi | 180 +++++++++++++++++++ > >> arch/riscv/boot/dts/starfive/jh8100.dtsi | 115 ++++++++++++ > > > > Why the split here? I mean why can't the clocks just be in the jh8100.dtsi? > > There should be. What's the point? Clocks are internal part of SoC and > not really re-usable piece of hardware. Can move it back to the SoC.dtsi > > Best regards, > Krzysztof
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