lkml.org 
[lkml]   [2023]   [Nov]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Date
    Subject[PATCH v3 01/11] dt-bindings: clock: qcom: document the SM8650 TCSR Clock Controller
    Add bindings documentation for the SM8650 TCSR Clock Controller.

    Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
    ---
    .../devicetree/bindings/clock/qcom,sm8550-tcsr.yaml | 8 ++++++--
    include/dt-bindings/clock/qcom,sm8650-tcsr.h | 18 ++++++++++++++++++
    2 files changed, 24 insertions(+), 2 deletions(-)

    diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
    index 1bf1a41fd89c..af16b05eac96 100644
    --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
    +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml
    @@ -13,12 +13,16 @@ description: |
    Qualcomm TCSR clock control module provides the clocks, resets and
    power domains on SM8550

    - See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h
    + See also:
    + - include/dt-bindings/clock/qcom,sm8550-tcsr.h
    + - include/dt-bindings/clock/qcom,sm8650-tcsr.h

    properties:
    compatible:
    items:
    - - const: qcom,sm8550-tcsr
    + - enum:
    + - qcom,sm8550-tcsr
    + - qcom,sm8650-tcsr
    - const: syscon

    clocks:
    diff --git a/include/dt-bindings/clock/qcom,sm8650-tcsr.h b/include/dt-bindings/clock/qcom,sm8650-tcsr.h
    new file mode 100644
    index 000000000000..b2c72d492f1f
    --- /dev/null
    +++ b/include/dt-bindings/clock/qcom,sm8650-tcsr.h
    @@ -0,0 +1,18 @@
    +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
    +/*
    + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
    + * Copyright (c) 2023, Linaro Limited
    + */
    +
    +#ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H
    +#define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H
    +
    +/* TCSR CC clocks */
    +#define TCSR_PCIE_0_CLKREF_EN 0
    +#define TCSR_PCIE_1_CLKREF_EN 1
    +#define TCSR_UFS_CLKREF_EN 2
    +#define TCSR_UFS_PAD_CLKREF_EN 3
    +#define TCSR_USB2_CLKREF_EN 4
    +#define TCSR_USB3_CLKREF_EN 5
    +
    +#endif
    --
    2.34.1

    \
     
     \ /
      Last update: 2023-11-20 13:48    [W:4.543 / U:0.108 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site