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    Subject[PATCH v2 3/6] media: qcom: camss: csiphy-3ph: Add Gen2 v1.1 two-phase MIPI CSI-2 DPHY init
    Add a PHY configuration sequence for the sc8280xp which uses a Qualcomm
    Gen 2 version 1.1 CSI-2 PHY.

    The PHY can be configured as two phase or three phase in C-PHY or D-PHY
    mode. This configuration supports two-phase D-PHY mode.

    Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
    ---
    .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 85 ++++++++++++++++++++++
    1 file changed, 85 insertions(+)

    diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
    index f50e2235c37fc..2eb3531ffd00b 100644
    --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
    +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
    @@ -148,6 +148,91 @@ csiphy_reg_t lane_regs_sdm845[5][14] = {
    },
    };

    +/* GEN2 1.1 2PH */
    +static const struct
    +csiphy_reg_t lane_regs_sc8280xp[5][14] = {
    + {
    + {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0000, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0008, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
    + {0x000c, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + },
    + {
    + {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0708, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
    + {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + },
    + {
    + {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0200, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0208, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
    + {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + },
    + {
    + {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0400, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0408, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
    + {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + },
    + {
    + {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0600, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0608, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
    + {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
    + {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
    + {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
    + },
    +};
    +
    /* GEN2 1.2.1 2PH */
    static const struct
    csiphy_reg_t lane_regs_sm8250[5][20] = {
    --
    2.42.0

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