Messages in this thread | ![/](/images/icornerl.gif) | | Date | Wed, 22 Nov 2023 11:06:50 +0100 | Subject | Re: [PATCH v2 2/2] dt-bindings: soc: Add new board description for MicroBlaze V | From | Krzysztof Kozlowski <> |
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On 22/11/2023 10:13, Michal Simek wrote: > MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. > It is hardware compatible with classic MicroBlaze processor. Processor can > be used with standard AMD/Xilinx IPs including interrupt controller and > timer. > > Signed-off-by: Michal Simek <michal.simek@amd.com> > --- > > Changes in v2: > - Put MicroBlaze V description to xilinx.yaml > - Add qemu target platform as platform used for testing.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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