Messages in this thread | ![/](/images/icornerl.gif) | | From | Geert Uytterhoeven <> | Date | Wed, 22 Nov 2023 17:36:24 +0100 | Subject | Re: [PATCH v4 05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC |
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On Wed, Nov 22, 2023 at 1:16 PM Yu Chien Peter Lin <peterlin@andestech.com> wrote: > The Andes hart-level interrupt controller (Andes INTC) allows AX45MP > cores to handle custom local interrupts, such as the performance > counter overflow interrupt. > > Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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