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    SubjectRe: [PATCH 09/12] RISC-V: crypto: add Zvknhb accelerated SHA384/512 implementations
    On Thu, Oct 26, 2023 at 02:36:41AM +0800, Jerry Shih wrote:
    > +static int riscv64_sha512_update(struct shash_desc *desc, const u8 *data,
    > + unsigned int len)
    > +{
    > + int ret = 0;
    > +
    > + /*
    > + * Make sure struct sha256_state begins directly with the SHA256
    > + * 256-bit internal state, as this is what the asm function expect.
    > + */
    > + BUILD_BUG_ON(offsetof(struct sha512_state, state) != 0);

    There's a copy-paste error here; all the 256 above should be 512.

    > +static struct shash_alg sha512_alg[] = {
    > + {
    > + .digestsize = SHA512_DIGEST_SIZE,
    > + .init = sha512_base_init,
    > + .update = riscv64_sha512_update,
    > + .final = riscv64_sha512_final,
    > + .finup = riscv64_sha512_finup,
    > + .descsize = sizeof(struct sha512_state),
    > + .base.cra_name = "sha512",
    > + .base.cra_driver_name = "sha512-riscv64-zvkb-zvknhb",
    > + .base.cra_priority = 150,
    > + .base.cra_blocksize = SHA512_BLOCK_SIZE,
    > + .base.cra_module = THIS_MODULE,
    > + },
    > + {
    > + .digestsize = SHA384_DIGEST_SIZE,
    > + .init = sha384_base_init,
    > + .update = riscv64_sha512_update,
    > + .final = riscv64_sha512_final,
    > + .finup = riscv64_sha512_finup,
    > + .descsize = sizeof(struct sha512_state),
    > + .base.cra_name = "sha384",
    > + .base.cra_driver_name = "sha384-riscv64-zvkb-zvknhb",
    > + .base.cra_priority = 150,
    > + .base.cra_blocksize = SHA384_BLOCK_SIZE,
    > + .base.cra_module = THIS_MODULE,
    > + }
    > +};

    *_algs instead of *_alg when there's more than one, please.
    I.e., sha512_alg => sha512_algs here.

    - Eric

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