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SubjectRe: [PATCH 1/2] Support rv32 ULEB128 test
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On 11/17/23 11:56, Charlie Jenkins wrote:
> Use opcodes available to both rv32 and rv64 in uleb128 module linking
> test.
>
> Fixes: af71bc194916 ("riscv: Add tests for riscv module loading")
> Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested

Thanks.

> ---
> arch/riscv/kernel/tests/module_test/test_uleb128.S | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kernel/tests/module_test/test_uleb128.S b/arch/riscv/kernel/tests/module_test/test_uleb128.S
> index 90f22049d553..8515ed7cd8c1 100644
> --- a/arch/riscv/kernel/tests/module_test/test_uleb128.S
> +++ b/arch/riscv/kernel/tests/module_test/test_uleb128.S
> @@ -6,13 +6,13 @@
> .text
> .global test_uleb_basic
> test_uleb_basic:
> - ld a0, second
> + lw a0, second
> addi a0, a0, -127
> ret
>
> .global test_uleb_large
> test_uleb_large:
> - ld a0, fourth
> + lw a0, fourth
> addi a0, a0, -0x07e8
> ret
>
> @@ -22,10 +22,10 @@ first:
> second:
> .reloc second, R_RISCV_SET_ULEB128, second
> .reloc second, R_RISCV_SUB_ULEB128, first
> - .dword 0
> + .word 0
> third:
> .space 1000
> fourth:
> .reloc fourth, R_RISCV_SET_ULEB128, fourth
> .reloc fourth, R_RISCV_SUB_ULEB128, third
> - .dword 0
> + .word 0
>

--
~Randy

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