Messages in this thread | | | Date | Mon, 20 Nov 2023 17:00:13 +0800 | Subject | Re: [PATCH 9/9] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform | From | Jie Luo <> |
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On 11/18/2023 11:36 PM, Andrew Lunn wrote: >> The clock arguments are provided in the later part as below. i will also >> provide more detail clock names for the new added clocks for the ipq5332 >> platform in description. >> >> - if: >> >> properties: >> >> compatible: >> >> contains: >> >> enum: >> >> - qcom,ipq5332-mdio >> >> then: >> >> properties: >> >> clocks: >> >> items: >> >> - description: MDIO clock source frequency fixed to 100MHZ >> >> - description: UNIPHY0 AHB clock source frequency fixed to >> 100MHZ >> - description: UNIPHY0 SYS clock source frequency fixed to 24MHZ >> - description: UNIPHY1 AHB clock source frequency fixed to >> 100MHZ >> - description: UNIPHY1 SYS clock source frequency fixed to 24MHZ > > As i said before, the frequency of the clocks does not matter > here. That appears to be the drivers problem. I assume every board > design, with any sort of PHY, needs the same clock configuration? > > Andrew
Yes, Andrew, no matter what kind of PHY is connected, these clocks are fix clocks, the clock rates are same as mentioned above, which are the SOC clock configurations.
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