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SubjectRe: [PATCH v2 2/2] dt-bindings: perf: starfive: Add StarLink PMU
On Tue, Nov 14, 2023 at 10:12:54AM +0800, Ji Sheng Teoh wrote:
> Add device tree binding for StarFive's StarLink PMU (Performance
> Monitor Unit).
>
> Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
> ---
> .../bindings/perf/starfive,starlink-pmu.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml
>
> diff --git a/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml b/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml
> new file mode 100644
> index 000000000000..b164f6849055
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/perf/starfive,starlink-pmu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive StarLink PMU
> +
> +maintainers:
> + - Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
> +
> +description:
> + StarFive's StarLink PMU integrates one or more CPU cores with a shared L3
> + memory system. The PMU support overflow interrupt, up to 16 programmable
> + 64bit event counters, and an independent 64bit cycle counter.
> + StarLink PMU is accessed via MMIO.
> +
> +properties:
> + compatible:
> + const: starfive,starlink-pmu

This compatible (in isolation) is far too generic. Please add a device
specific compatible for the device that has this PMU.

Thanks,
Conor.

> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + soc {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + l3_pmu: pmu@12900000 {
> + compatible = "starfive,starlink-pmu";
> + reg = <0x0 0x12900000 0x0 0x10000>;
> + interrupts = <34>;
> + };
> + };
> --
> 2.25.1
>
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