Messages in this thread | | | From | Jernej Škrabec <> | Subject | Re: [PATCH 1/4] nvmem: sunxi_sid: Always use 32-bit MMIO reads | Date | Sun, 08 Jan 2023 21:50:18 +0100 |
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Dne nedelja, 14. avgust 2022 ob 19:36:52 CET je Samuel Holland napisal(a): > The SID SRAM on at least some SoCs (A64 and D1) returns different values > when read with bus cycles narrower than 32 bits. This is not immediately > obvious, because memcpy_fromio() uses word-size accesses as long as > enough data is being copied. > > The vendor driver always uses 32-bit MMIO reads, so do the same here. > This is faster than the register-based method, which is currently used > as a workaround on A64. And it fixes the values returned on D1, where > the SRAM method was being used. > > The special case for the last word is needed to maintain .word_size == 1 > for sysfs ABI compatibility, as noted previously in commit de2a3eaea552 > ("nvmem: sunxi_sid: Optimize register read-out method"). > > Fixes: 07ae4fde9efa ("nvmem: sunxi_sid: Add support for D1 variant") > Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards, Jernej
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