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    Subject[PATCH v6 2/7] perf vendor events arm64: Add topdown L1 metrics for neoverse-n2-v2
    Date
    Due to the wrong count of stall_slot and stall_slot_frontend on
    neoverse-n2, the real stall_slot and real stall_slot_frontend need to
    subtract cpu_cycles, so overwrite the "MetricExpr" for neoverse-n2.
    Reference from ARM neoverse-n2 errata notice [0], D117.

    Since neoverse-n2/neoverse-v2 does not yet support topdown L2, metric
    groups such as Cache, TLB, Branch, InstructionsMix and PEutilization
    will be added to further analysis of performance bottlenecks in the
    following patches. Reference from ARM PMU guide [1][2].

    [0] https://documentation-service.arm.com/static/636a66a64e6cf12278ad89cb?token=
    [1] https://documentation-service.arm.com/static/628f8fa3dfaf015c2b76eae8?token=
    [2] https://documentation-service.arm.com/static/62cfe21e31ea212bb6627393?token=

    Signed-off-by: Jing Zhang <renyu.zj@linux.alibaba.com>
    Acked-by: Ian Rogers <irogers@google.com>
    ---
    .../arch/arm64/arm/neoverse-n2-v2/metrics.json | 17 +++++++++++++++++
    1 file changed, 17 insertions(+)
    create mode 100644 tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json

    diff --git a/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json
    new file mode 100644
    index 0000000..4e7417f
    --- /dev/null
    +++ b/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/metrics.json
    @@ -0,0 +1,17 @@
    +[
    + {
    + "ArchStdEvent": "FRONTEND_BOUND",
    + "MetricExpr": "((stall_slot_frontend) if (#slots - 5) else (stall_slot_frontend - cpu_cycles)) / (#slots * cpu_cycles)"
    + },
    + {
    + "ArchStdEvent": "BAD_SPECULATION",
    + "MetricExpr": "(1 - op_retired / op_spec) * (1 - (stall_slot if (#slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))"
    + },
    + {
    + "ArchStdEvent": "RETIRING",
    + "MetricExpr": "(op_retired / op_spec) * (1 - (stall_slot if (#slots - 5) else (stall_slot - cpu_cycles)) / (#slots * cpu_cycles))"
    + },
    + {
    + "ArchStdEvent": "BACKEND_BOUND"
    + }
    +]
    --
    1.8.3.1
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