Messages in this thread | | | Date | Mon, 30 Jan 2023 19:04:50 +0100 | From | Borislav Petkov <> | Subject | Re: [Question PATCH kernel] x86/amd/sev/nmi+vc: Fix stack handling (why is this happening?) |
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On Mon, Jan 30, 2023 at 09:30:38AM -0800, H. Peter Anvin wrote: > It's somewhat odd to me that reading %dr7 is volatile, but %dr6 is > not... %dr6 is the status register!
Yeah, as a precaution I think we should make all those volatile. Just in case.
> I believe they should all be volatile (the compiler semantics is that > volatile operations are always executed exactly once, in strict > program order with respect to any other volatile operations); the real > question is if there should also be memory clobbers on %dr6 reads and > any %dr write.
Yes, I think so too. From gcc docs:
"6.47.2.1 Volatile .................
...
Note that the compiler can move even 'volatile asm' instructions relative to other code, including across jump instructions."
We already have __FORCE_ORDER for exactly things like that.
-- Regards/Gruss, Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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