Messages in this thread | | | Date | Thu, 29 Sep 2022 15:07:49 +0200 | Subject | Re: [PATCH v3 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping | From | AngeloGioacchino Del Regno <> |
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Il 29/09/22 13:46, Johnson Wang ha scritto: > Add the new binding documentation for MediaTek frequency hopping > and spread spectrum clocking control. > > Co-developed-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> > Signed-off-by: Johnson Wang <johnson.wang@mediatek.com> > --- > .../arm/mediatek/mediatek,mt8186-fhctl.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > new file mode 100644 > index 000000000000..258dff7ce6bc > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-fhctl.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-fhctl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek frequency hopping and spread spectrum clocking control > + > +maintainers: > + - Edward-JW Yang <edward-jw.yang@mediatek.com> > + > +description: | > + Frequency hopping control (FHCTL) is a piece of hardware that control > + some PLLs to adopt "hopping" mechanism to adjust their frequency. > + Spread spectrum clocking (SSC) is another function provided by this hardware. > + > +properties: > + compatible: > + const: mediatek,mt8186-fhctl > + > + reg: > + maxItems: 1 > + > + clocks: > + description: Phandles of the PLL with FHCTL hardware capability. > + minItems: 1 > + maxItems: 30 > + > + mediatek,hopping-ssc-percent: > + description: The percentage of spread spectrum clocking for one PLL. > + minItems: 1 > + maxItems: 30 > + items: > + default: 0 > + minimum: 0 > + maximum: 8 > + > +required: > + - compatible > + - reg > + - clocks > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/mt8186-clk.h> > + fhctl: fhctl@1000ce00 { > + compatible = "mediatek,mt8186-fhctl"; > + reg = <0x1000c000 0xe00>; > + clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; > + mediatek,hopping-ssc-percent = <3>; > + };
.... a more realistic example:
#include <dt-bindings/clock/mt8186-clk.h>
soc { #address-cells = <2>; #size-cells = <2>;
fhctl: fhctl@1000ce00 { compatible = "mediatek,mt8186-fhctl"; reg = <0 0x1000c000 0 0xe00>; clocks = <&apmixedsys CLK_APMIXED_MSDCPLL>; mediatek,hopping-ssc-percent = <3>; }; };
After which...
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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