Messages in this thread Patch in this message | | | Date | Thu, 29 Sep 2022 10:21:00 -0000 | From | "irqchip-bot for Apurva Nandan" <> | Subject | [irqchip: irq/irqchip-next] dt-bindings: interrupt-controller: ti,sci-intr: Fix missing reg property in the binding |
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The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: daa0b6d0187599a574cb5cb392b259bda3dcf979 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/daa0b6d0187599a574cb5cb392b259bda3dcf979 Author: Apurva Nandan <a-nandan@ti.com> AuthorDate: Sat, 20 Aug 2022 00:37:29 +05:30 Committer: Marc Zyngier <maz@kernel.org> CommitterDate: Thu, 29 Sep 2022 11:13:43 +01:00
dt-bindings: interrupt-controller: ti,sci-intr: Fix missing reg property in the binding
Fix the following warning in dtbs_check interrupt-controller@a00000: Unevaluated properties are not allowed ('reg' was unexpected)
Add the reg property in the schema.
Signed-off-by: Apurva Nandan <a-nandan@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220819190729.32358-4-a-nandan@ti.com --- Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml index e12aee4..c99cc73 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml @@ -58,6 +58,9 @@ properties: 1 = If intr supports edge triggered interrupts. 4 = If intr supports level triggered interrupts. + reg: + maxItems: 1 + interrupt-controller: true '#interrupt-cells':
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