Messages in this thread | | | Subject | Re: [PATCH RESEND v2 1/5] clk: mxl: Switch from direct readl/writel based IO to regmap based IO | From | Stephen Boyd <> | Date | Wed, 28 Sep 2022 17:14:13 -0700 |
| |
Quoting Rahul Tanwar (2022-09-21 23:24:24) > diff --git a/drivers/clk/x86/clk-cgu-pll.c b/drivers/clk/x86/clk-cgu-pll.c > index 3179557b5f78..c83083affe88 100644 > --- a/drivers/clk/x86/clk-cgu-pll.c > +++ b/drivers/clk/x86/clk-cgu-pll.c > @@ -1,8 +1,9 @@ > // SPDX-License-Identifier: GPL-2.0 > /* > + * Copyright (C) 2020-2022 MaxLinear, Inc. > * Copyright (C) 2020 Intel Corporation. > - * Zhu YiXin <yixin.zhu@intel.com> > - * Rahul Tanwar <rahul.tanwar@intel.com> > + * Zhu Yixin <yzhu@maxlinear.com>
Does Zhu Yixin approve? They're not Cced on this patch.
> + * Rahul Tanwar <rtanwar@maxlinear.com> > */ > > #include <linux/clk-provider.h>
| |