Messages in this thread | | | Date | Tue, 27 Sep 2022 16:01:05 +0200 | Subject | Re: [PATCH v2 01/33] arm64: dts: qcom: ipq6018-cp01-c1: correct blspi1 pins | From | Robert Marko <> |
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On 26. 09. 2022. 09:43, Krzysztof Kozlowski wrote: > When BLSPI1 (originally SPI0, later renamed in commit f82c48d46852 > ("arm64: dts: qcom: ipq6018: correct QUP peripheral labels")) was added, > the device node lacked respective pin configuration assignment. It > used also blsp0_spi function but that was probably the same mistake as > naming it SPI0.
Hi,
Sorry for making it confusing, but "blsp0_spi" is the correct function. Pinctrl driver and datasheets call functions blsp0-blps5, but usually in DT we call the nodes blsp1-blsp6.
It would probably be better for me to rename the nodes to blsp0-5 instead.
Regards, Robert
> > Fixes: 5bf635621245 ("arm64: dts: ipq6018: Add a few device nodes") > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- > arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > index 1ba2eca33c7b..afc2dc79767d 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > +++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts > @@ -37,6 +37,8 @@ &blsp1_i2c3 { > > &blsp1_spi1 { > cs-select = <0>; > + pinctrl-0 = <&spi_0_pins>; > + pinctrl-names = "default"; > status = "okay"; > > flash@0 { > @@ -57,7 +59,7 @@ i2c_1_pins: i2c-1-pins { > > spi_0_pins: spi-0-pins { > pins = "gpio38", "gpio39", "gpio40", "gpio41"; > - function = "blsp0_spi"; > + function = "blsp1_spi"; > drive-strength = <8>; > bias-pull-down; > };
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