Messages in this thread | | | Date | Tue, 27 Sep 2022 12:39:41 +0200 | Subject | Re: [PATCH 3/6] clk: mediatek: mt8192: Do not re-register top_early_divs in probe function | From | AngeloGioacchino Del Regno <> |
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Il 26/09/22 12:25, Chen-Yu Tsai ha scritto: > top_early_divs are registered in the CLK_OF_DECLARE_DRIVER() half of the > topckgen clk driver. Don't try to register it again in the actual probe > function. This gets rid of the "Trying to register duplicate clock ..." > warning. > > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Can't we simply remove the CLK_OF_DECLARE_DRIVER() and top_init_early entirely, and transfer TOP_CSW_F26M_D2 to top_divs[] instead? I get that systimer concern and we have something similar in MT8195, where the TOP_CLK26M_D2 is registered "late".
Getting back to MT8192, TOP_CSW_F26M_D2 seems to be used only for: 1. systimer 2. SPMI MST (registered "late").
Being it a fixed factor clock, parented to another fixed clock, it doesn't even have any ON/OFF switch, so I think it would be actually possible to go for the proposed removal... which would further improve this cleanup.
Regards, Angelo
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