Messages in this thread | | | From | Asmaa Mnebhi <> | Subject | RE: [PATCH v7 1/2] i2c: mlxbf: support BlueField-3 SoC | Date | Tue, 27 Sep 2022 21:00:42 +0000 |
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Thank you Wolfram!
-----Original Message----- From: Wolfram Sang <wsa+renesas@sang-engineering.com> Sent: Tuesday, September 27, 2022 4:47 PM To: Asmaa Mnebhi <asmaa@nvidia.com> Cc: linux-i2c@vger.kernel.org; linux-kernel@vger.kernel.org; Khalil Blaiech <kblaiech@nvidia.com> Subject: Re: [PATCH v7 1/2] i2c: mlxbf: support BlueField-3 SoC
On Tue, Sep 27, 2022 at 04:39:23PM -0400, Asmaa Mnebhi wrote: > BlueField-3 SoC has the same I2C IP logic as previous > BlueField-1 and 2 SoCs but it has different registers' addresses. > This is an effort to keep this driver generic accross all BlueField > generations. > This patch breaks down the "smbus" resource into 3 separate resources > to enable us to use common registers' offsets for all BlueField SoCs: > struct mlxbf_i2c_resource *timer; > struct mlxbf_i2c_resource *mst; > struct mlxbf_i2c_resource *slv; > > Of course, all offsets had to be adjusted accordingly, and we took > this chance to reorganize the macros depending on the register block > they target. > > There are only 2 registers' offsets that do not fit within this schema > so their offsets are passed as SoC-specific parameters: > smbus_master_rs_bytes_off > smbus_master_fsm_off > > Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> > Signed-off-by: Asmaa Mnebhi <asmaa@nvidia.com>
Applied to for-next, thanks!
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