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    Subject[PATCH 5.19 178/207] drm/amdgpu: change the alignment size of TMR BO to 1M
    Date
    From: Yang Wang <KevinYang.Wang@amd.com>

    [ Upstream commit 36de13fdb04abef3ee03ade5129ab146de63983b ]

    align TMR BO size TO tmr size is not necessary,
    modify the size to 1M to avoid re-create BO fail
    when serious VRAM fragmentation.

    v2:
    add new macro PSP_TMR_ALIGNMENT for TMR BO alignment size

    Signed-off-by: Yang Wang <KevinYang.Wang@amd.com>
    Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
    drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 1 +
    2 files changed, 2 insertions(+), 1 deletion(-)

    diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
    index b19bf0c3f373..79ce654bd3da 100644
    --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
    +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
    @@ -748,7 +748,7 @@ static int psp_tmr_init(struct psp_context *psp)
    }

    pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
    - ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE(psp->adev),
    + ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
    AMDGPU_GEM_DOMAIN_VRAM,
    &psp->tmr_bo, &psp->tmr_mc_addr, pptr);

    diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
    index e431f4994931..cd366c7f311f 100644
    --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
    +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
    @@ -36,6 +36,7 @@
    #define PSP_CMD_BUFFER_SIZE 0x1000
    #define PSP_1_MEG 0x100000
    #define PSP_TMR_SIZE(adev) ((adev)->asic_type == CHIP_ALDEBARAN ? 0x800000 : 0x400000)
    +#define PSP_TMR_ALIGNMENT 0x100000
    #define PSP_FW_NAME_LEN 0x24

    enum psp_shared_mem_size {
    --
    2.35.1


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