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SubjectRe: [PATCH v2 13/13] dt-bindings: arm: Add Samsung Trinity bindings
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On 17/09/2022 09:23, Jiho Chu wrote:
> The Trinity Neural Processing Unit (NPU) is a hardware IP for providing
> hardware acceleration for neural network processing workloads. It has
> own virtual ISA decoder unit, and controlled by memory mapped control
> registers. The IP is composed of Common Processor (CP), Digital Signal
> Processor (DSP) and Deep Learning Accelerator (DLA). ComBox is register
> set to control IRQ or check overall status of the IP.
>
> Signed-off-by: Jiho Chu <jiho.chu@samsung.com>
> Signed-off-by: Yelin Jeong <yelini.jeong@samsung.com>
> Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
> ---
> .../bindings/arm/samsung,trinity.yaml | 115 ++++++++++++++++++
> 1 file changed, 115 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/samsung,trinity.yaml
>
> diff --git a/Documentation/devicetree/bindings/arm/samsung,trinity.yaml b/Documentation/devicetree/bindings/arm/samsung,trinity.yaml
> new file mode 100644
> index 000000000000..cd79ec040162
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/samsung,trinity.yaml
> @@ -0,0 +1,115 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/samsung,trinity.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Samsung Trinity NPU Family
> +
> +maintainers:
> + - Jiho Chu <jiho.chu@samsung.com>
> +
> +description: |
> + The Trinity Neural Processing Unit (NPU) is a hardware IP for providing
> + hardware acceleration for neural network processing workloads. It has
> + own virtual ISA decoder unit, and controlled by memory mapped control
> + registers. The IP is composed of Common Processor (CP), Digital Signal
> + Processor (DSP) and Deep Learning Accelerator (DLA). ComBox is register
> + set to control IRQ or check overall status of the IP.
> +
> +properties:
> + compatible:
> + const: samsung,trinity
> +
> + samsung,trinity-type:
> + description: type of trinity family
> + enum: ['triv2']

No, we have compatible for this.

> +
> + samsung,tops:
> + description: Performance metric (Tera Operation Per Seconds)
> + enum: [2, 8]

What piece of hardware this describes?

> +
> + samsung,idu_cp:

No underscores in names.

Missing ref/type. Missing description. I am not sure that this belongs
to DT.


> + items:
> + - description: Address of zero data of CP
> + - description: Address of IDU data of CP
> + - description: Maximum size of CP's IDU binary

> +
> + samsung,idu_dsp:

The same.

> + items:
> + - description: Address of zero data of DSP
> + - description: Address of IDU data of DSP
> + - description: Maximum size of DSP's IDU binary
> +
> + samsung,dspm:
> + description: The size of Data Scratch-Pad Memory
> +
> + memory-region:
> + description:
> + phandle to the reserved memory node to be associated
> + with the trinity device. The reserved memory node
> + can be a CMA memory node.
> + Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml
> +
> + dma-coherent: true
> +
> + reg:
> + items:
> + - description: Memory mapped register of CP
> + - description: Memory mapped register of DSP
> + - description: Memory mapped register of ComBox
> +
> + reg-names:
> + items:
> + - const: cp-mmreg
> + - const: dsp-mmreg
> + - const: cbox-mmreg

Drop "reg" suffixes.

> +
> + interrupts:
> + description: workload complete interrupt
> + maxItems: 1
> +
> +required:
> + - compatible
> + - samsung,trinity-type
> + - samsung,tops
> + - samsung,idu_cp
> + - samsung,idu_dsp
> + - samsung,dspm
> + - memory-region
> + - dma-coherent
> + - reg
> + - reg-names
> + - interrupts
> +
> +examples:
> + - |
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + trinity_dram_0: memory@80000000 {
> + compatible = "shared-dma-pool";
> + no-map;
> + reg = <0x0 0x80000000 0x10000000>;
> + };
> + };

Drop this part - it is fairly obvious.

> +
> + triv2@0x30C00000 {
> + compatible = "samsung,trinity";
> + samsung,trinity-type = "triv2";
> + samsung,tops = <8>;
> + samsung,idu_cp = /bits/ 64 <0x30400000 0x30400010 0x10000>;
> + samsung,idu_dsp = /bits/ 64 <0x30500000 0x30500010 0x10000>;
> + samsung,dspm = <0x40000>;
> +
> + memory-region = <&trinity_dram_0>
> +
> + dma-coherent;
> +
> + reg = <0x0 0x30C10000 0x0 0x10000>, /* CP MMREG base */
> + <0x0 0x30D40000 0x0 0x10000>, /* DSP MMREG base */
> + <0x0 0x30DF0000 0x0 0x01000>; /* ComBox MMREG base */


reg and reg-names go after compatible.

> + reg-names = "cp-mmreg", "dsp-mmreg", "cbox-mmreg";
> +
> + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
> + };

Best regards,
Krzysztof

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