Messages in this thread | | | Date | Fri, 19 Aug 2022 15:45:43 +0300 | Subject | Re: [PATCH 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids | From | Krzysztof Kozlowski <> |
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On 19/08/2022 15:22, Conor Dooley wrote: > Each Clock Conditioning Circuitry block contains 2 PLLs and 2 DLLs. > The PLLs have 4 outputs each and the DLLs 2. Add 16 new IDs covering > these clocks. For more information on the CCC hardware, see the > "PolarFire SoC FPGA Clocking Resources" document at the link below. > > Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > .../dt-bindings/clock/microchip,mpfs-clock.h | 23 +++++++++++++++++++
This could be also a separate header file for CCC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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