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    Subject[PATCH 5.19 0712/1157] iio: potentiometer: mcp41010: Fix alignment for DMA safety
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit c5f78f4d2168ba21324095b0d46d4353c2eace4d ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Fixes: 092cb71a604e ("iio: potentiometer: Add driver for Microchip MCP41xxx/42xxx")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-84-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/potentiometer/mcp41010.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iio/potentiometer/mcp41010.c b/drivers/iio/potentiometer/mcp41010.c
    index 30a4594d4e11..2b73c7540209 100644
    --- a/drivers/iio/potentiometer/mcp41010.c
    +++ b/drivers/iio/potentiometer/mcp41010.c
    @@ -60,7 +60,7 @@ struct mcp41010_data {
    const struct mcp41010_cfg *cfg;
    struct mutex lock; /* Protect write sequences */
    unsigned int value[MCP41010_MAX_WIPERS]; /* Cache wiper values */
    - u8 buf[2] ____cacheline_aligned;
    + u8 buf[2] __aligned(IIO_DMA_MINALIGN);
    };

    #define MCP41010_CHANNEL(ch) { \
    --
    2.35.1


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