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    Subject[PATCH 5.19 0717/1157] iio: temp: ltc2983: Fix alignment for DMA safety
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit 732f2cb2fbb51bd5bc03a114bd102ab3b2f537fe ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Fixes: f110f3188e56 ("iio: temperature: Add support for LTC2983")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-91-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/temperature/ltc2983.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/drivers/iio/temperature/ltc2983.c b/drivers/iio/temperature/ltc2983.c
    index 4fc654275155..4b7f2b8a9758 100644
    --- a/drivers/iio/temperature/ltc2983.c
    +++ b/drivers/iio/temperature/ltc2983.c
    @@ -204,11 +204,11 @@ struct ltc2983_data {
    u8 num_channels;
    u8 iio_channels;
    /*
    - * DMA (thus cache coherency maintenance) requires the
    + * DMA (thus cache coherency maintenance) may require the
    * transfer buffers to live in their own cache lines.
    * Holds the converted temperature
    */
    - __be32 temp ____cacheline_aligned;
    + __be32 temp __aligned(IIO_DMA_MINALIGN);
    };

    struct ltc2983_sensor {
    --
    2.35.1


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