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    Subject[PATCH 5.19 0652/1157] iio: adc: max1027: Fix alignment for DMA safety
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit e754fb7e7a05e3838c9aa044b4114869dd0d1e17 ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Fixes: fc167f624833 ("iio: add support of the max1027")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-24-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/adc/max1027.c | 2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

    diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c
    index 4daf1d576c4e..b725d012625c 100644
    --- a/drivers/iio/adc/max1027.c
    +++ b/drivers/iio/adc/max1027.c
    @@ -272,7 +272,7 @@ struct max1027_state {
    struct mutex lock;
    struct completion complete;

    - u8 reg ____cacheline_aligned;
    + u8 reg __aligned(IIO_DMA_MINALIGN);
    };

    static int max1027_wait_eoc(struct iio_dev *indio_dev)
    --
    2.35.1


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