lkml.org 
[lkml]   [2022]   [Aug]   [15]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 5.19 0260/1157] arm64: dts: qcom: sm8250: add missing PCIe PHY clock-cells
    Date
    From: Johan Hovold <johan+linaro@kernel.org>

    [ Upstream commit d9fd162ce764c227fcfd4242f6c1639895a9481f ]

    Add the missing '#clock-cells' properties to the PCIe QMP PHY nodes.

    Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
    Fixes: e53bdfc00977 ("arm64: dts: qcom: sm8250: Add PCIe support")
    Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
    Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
    Link: https://lore.kernel.org/r/20220705114032.22787-3-johan+linaro@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/boot/dts/qcom/sm8250.dtsi | 6 ++++++
    1 file changed, 6 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    index d0760e6ec942..e8cdca50bc83 100644
    --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
    @@ -1884,6 +1884,8 @@ pcie0_lane: phy@1c06200 {
    clock-names = "pipe0";

    #phy-cells = <0>;
    +
    + #clock-cells = <0>;
    clock-output-names = "pcie_0_pipe_clk";
    };
    };
    @@ -1990,6 +1992,8 @@ pcie1_lane: phy@1c0e200 {
    clock-names = "pipe0";

    #phy-cells = <0>;
    +
    + #clock-cells = <0>;
    clock-output-names = "pcie_1_pipe_clk";
    };
    };
    @@ -2096,6 +2100,8 @@ pcie2_lane: phy@1c16200 {
    clock-names = "pipe0";

    #phy-cells = <0>;
    +
    + #clock-cells = <0>;
    clock-output-names = "pcie_2_pipe_clk";
    };
    };
    --
    2.35.1


    \
     
     \ /
      Last update: 2022-08-16 01:01    [W:4.034 / U:0.072 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site