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    Subject[PATCH 5.19 0085/1157] drm/ingenic: Use the highest possible DMA burst size
    Date
    From: Paul Cercueil <paul@crapouillou.net>

    commit f0dce5c4fdaf9e98dd2755ffb1363822854b6287 upstream.

    Until now, when running at the maximum resolution of 1280x720 at 32bpp
    on the JZ4770 SoC the output was garbled, the X/Y position of the
    top-left corner of the framebuffer warping to a random position with
    the whole image being offset accordingly, every time a new frame was
    being submitted.

    This problem can be eliminated by using a bigger burst size for the DMA.

    Set in each soc_info structure the maximum burst size supported by the
    corresponding SoC, and use it in the driver.

    Set the new value using regmap_update_bits() instead of
    regmap_set_bits(), since we do want to override the old value of the
    burst size. (Note that regmap_set_bits() wasn't really valid before for
    the same reason, but it never seemed to be a problem).

    Cc: <stable@vger.kernel.org>
    Fixes: 90b86fcc47b4 ("DRM: Add KMS driver for the Ingenic JZ47xx SoCs")
    Signed-off-by: Paul Cercueil <paul@crapouillou.net>
    Link: https://patchwork.freedesktop.org/patch/msgid/20220702230727.66704-1-paul@crapouillou.net
    Acked-by: Sam Ravnborg <sam@ravnborg.org>
    Tested-by: Christophe Branchereau <cbranchereau@gmail.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
    ---
    drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 10 ++++++++--
    drivers/gpu/drm/ingenic/ingenic-drm.h | 3 +++
    2 files changed, 11 insertions(+), 2 deletions(-)

    --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
    +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
    @@ -69,6 +69,7 @@ struct jz_soc_info {
    bool map_noncoherent;
    bool use_extended_hwdesc;
    bool plane_f0_not_working;
    + u32 max_burst;
    unsigned int max_width, max_height;
    const u32 *formats_f0, *formats_f1;
    unsigned int num_formats_f0, num_formats_f1;
    @@ -318,8 +319,9 @@ static void ingenic_drm_crtc_update_timi
    regmap_write(priv->map, JZ_REG_LCD_REV, mode->htotal << 16);
    }

    - regmap_set_bits(priv->map, JZ_REG_LCD_CTRL,
    - JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16);
    + regmap_update_bits(priv->map, JZ_REG_LCD_CTRL,
    + JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_MASK,
    + JZ_LCD_CTRL_OFUP | priv->soc_info->max_burst);

    /*
    * IPU restart - specify how much time the LCDC will wait before
    @@ -1518,6 +1520,7 @@ static const struct jz_soc_info jz4740_s
    .map_noncoherent = false,
    .max_width = 800,
    .max_height = 600,
    + .max_burst = JZ_LCD_CTRL_BURST_16,
    .formats_f1 = jz4740_formats,
    .num_formats_f1 = ARRAY_SIZE(jz4740_formats),
    /* JZ4740 has only one plane */
    @@ -1529,6 +1532,7 @@ static const struct jz_soc_info jz4725b_
    .map_noncoherent = false,
    .max_width = 800,
    .max_height = 600,
    + .max_burst = JZ_LCD_CTRL_BURST_16,
    .formats_f1 = jz4725b_formats_f1,
    .num_formats_f1 = ARRAY_SIZE(jz4725b_formats_f1),
    .formats_f0 = jz4725b_formats_f0,
    @@ -1541,6 +1545,7 @@ static const struct jz_soc_info jz4770_s
    .map_noncoherent = true,
    .max_width = 1280,
    .max_height = 720,
    + .max_burst = JZ_LCD_CTRL_BURST_64,
    .formats_f1 = jz4770_formats_f1,
    .num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1),
    .formats_f0 = jz4770_formats_f0,
    @@ -1555,6 +1560,7 @@ static const struct jz_soc_info jz4780_s
    .plane_f0_not_working = true, /* REVISIT */
    .max_width = 4096,
    .max_height = 2048,
    + .max_burst = JZ_LCD_CTRL_BURST_64,
    .formats_f1 = jz4770_formats_f1,
    .num_formats_f1 = ARRAY_SIZE(jz4770_formats_f1),
    .formats_f0 = jz4770_formats_f0,
    --- a/drivers/gpu/drm/ingenic/ingenic-drm.h
    +++ b/drivers/gpu/drm/ingenic/ingenic-drm.h
    @@ -106,6 +106,9 @@
    #define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
    #define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
    #define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
    +#define JZ_LCD_CTRL_BURST_32 (0x3 << 28)
    +#define JZ_LCD_CTRL_BURST_64 (0x4 << 28)
    +#define JZ_LCD_CTRL_BURST_MASK (0x7 << 28)
    #define JZ_LCD_CTRL_RGB555 BIT(27)
    #define JZ_LCD_CTRL_OFUP BIT(26)
    #define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)

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