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    Subject[PATCH 5.18 0678/1095] clk: imx: clk-fracn-gppll: fix mfd value
    Date
    From: Peng Fan <peng.fan@nxp.com>

    [ Upstream commit 044034efbeea05f65c09d2ba15ceeab53b60e947 ]

    According to spec:
    A value of 0 is disallowed and should not be programmed in this register

    Fix to 1.

    Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    Reviewed-by: Jacky Bai <ping.bai@nxp.com>
    Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
    Link: https://lore.kernel.org/r/20220609132902.3504651-5-peng.fan@oss.nxp.com
    Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/clk/imx/clk-fracn-gppll.c | 8 ++++----
    1 file changed, 4 insertions(+), 4 deletions(-)

    diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
    index 71c102d950ab..36a53c60e71f 100644
    --- a/drivers/clk/imx/clk-fracn-gppll.c
    +++ b/drivers/clk/imx/clk-fracn-gppll.c
    @@ -64,10 +64,10 @@ struct clk_fracn_gppll {
    * Fout = Fvco / (rdiv * odiv)
    */
    static const struct imx_fracn_gppll_rate_table fracn_tbl[] = {
    - PLL_FRACN_GP(650000000U, 81, 0, 0, 0, 3),
    - PLL_FRACN_GP(594000000U, 198, 0, 0, 0, 8),
    - PLL_FRACN_GP(560000000U, 70, 0, 0, 0, 3),
    - PLL_FRACN_GP(400000000U, 50, 0, 0, 0, 3),
    + PLL_FRACN_GP(650000000U, 81, 0, 1, 0, 3),
    + PLL_FRACN_GP(594000000U, 198, 0, 1, 0, 8),
    + PLL_FRACN_GP(560000000U, 70, 0, 1, 0, 3),
    + PLL_FRACN_GP(400000000U, 50, 0, 1, 0, 3),
    PLL_FRACN_GP(393216000U, 81, 92, 100, 0, 5)
    };

    --
    2.35.1


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