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    Subject[PATCH 5.18 0643/1095] iio: dac: ltc2688: Fix alignment for DMA safety
    Date
    From: Jonathan Cameron <Jonathan.Cameron@huawei.com>

    [ Upstream commit 2030708377a219b548a9a36da57d3852382baf1d ]

    ____cacheline_aligned is an insufficient guarantee for non-coherent DMA
    on platforms with 128 byte cachelines above L1. Switch to the updated
    IIO_DMA_MINALIGN definition.

    Update the comment to include 'may'.

    Fixes: 832cb9eeb931 ("iio: dac: add support for ltc2688")
    Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
    Acked-by: Nuno Sá <nuno.sa@analog.com>
    Link: https://lore.kernel.org/r/20220508175712.647246-60-jic23@kernel.org
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    drivers/iio/dac/ltc2688.c | 4 ++--
    1 file changed, 2 insertions(+), 2 deletions(-)

    diff --git a/drivers/iio/dac/ltc2688.c b/drivers/iio/dac/ltc2688.c
    index 2f9c384885f4..04ec38b1cad1 100644
    --- a/drivers/iio/dac/ltc2688.c
    +++ b/drivers/iio/dac/ltc2688.c
    @@ -91,10 +91,10 @@ struct ltc2688_state {
    struct mutex lock;
    int vref;
    /*
    - * DMA (thus cache coherency maintenance) requires the
    + * DMA (thus cache coherency maintenance) may require the
    * transfer buffers to live in their own cache lines.
    */
    - u8 tx_data[6] ____cacheline_aligned;
    + u8 tx_data[6] __aligned(IIO_DMA_MINALIGN);
    u8 rx_data[3];
    };

    --
    2.35.1


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